DSO533SK

Features

  • Package size： 5032size, 1.1mm height
  • 2.5V/3.3V operating voltage, High speed type（13.5 to212.5MHz）
  • 3-state function
  • LV-PECL output

Applications

  • Sever, SONET/SDH, PC

j9九游会ag官网平台

Type Legend DSO533SK
Output Specification - LV-PECL
Output Frequency Range fo 13.5 to 212.5MHz
Supply Voltage VCC +2.5V±0.125V/+3.3V±0.165V
Frequency Tolerance
(Includes frequency tolerance at room temperature.)		 f_tol ±50×10-6 max., ±100×10-6 max.
Storage Temperature Range T_stg -40 to +85℃
Operating Temperature Range T_use -10 to +70℃, -40 to +85℃
Current Consumption ICC 45mA max. (fo≦170MHz), 50mA max. (170MHz
Stand-by Current (#1 pin "L"Level) I_std 10μA max.
Load Condition Load-R 50Ω to VCC-2V
Symmetry SYM 45 to 55% [at outputs cross point]
0 Level Output Voltage VOL VCC-1.81 to VCC-1.62V
1 Level Output Voltage VOH VCC-1.025 to VCC-0.88V
Rise and Fall Time tr, tf 0.5ns max. [20~80% Output, OutputN]
Differential Output Voltage VOD1, VOD2 -
Change to VOD ΔVOD -
Offset Voltage VOS -
Offset to VOS ΔVOS -
OE Pin 0 Level Input Voltage VIL VCC×0.3 max.
OE Pin 1 Level Input Voltage VIH VCC×0.7 min.
Output Disable Time tPLZ 200ns
Output Enable Time tPZL 2ms
Period Jitter (1) tRMS 5ps typ. (13.5MHz≦fo<27MHz) / 2.5ps typ. (27MHz≦fo≦212.5MHz) (σ)
tp-p 33ps typ. (13.5MHz≦fo<27MHz) / 22ps typ. (27MHz≦fo≦212.5MHz) (Peak to peak)
Total Jitter (1) tTL 50ps typ. (13.5MHz≦fo<27MHz) / 35ps typ. (27MHz≦fo≦212.5MHz)
[tDJ + n×tRJ n=14.1 (BER=1×10-12) (2)]
Phase Jitter tpj 1.5ps max. (13.5MHz≦fo<27MHz) / 1ps max. (27MHz≦fo≦212.5MHz)
[13.5MHz≦fo<40MHz,fo offset:12kHz to 5MHz fo≧ 40MHz,fo offset:12kHz to 20MHz]
Packing Unit (3) - 1000pcs./reel (Φ180)

(1)Measured WAVECREST DTS-2075
(2)tDJ：Deterministic jitter tRJ：Random jitter
(3) Moisture prevention packing is unnecessary.
Moisture Sensitivity Level: LEVEL 1(IPC/JEDEC J-STD-033)

Consult our sales representative for other specifications.

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